添加一些关于midi播放的项目
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terryLP
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;/*****************************************************************************
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; * @file: startup_NV32.s
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; * @purpose: CMSIS Cortex-M0plus Core Device Startup File for the
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; * NV32F100
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;*
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; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
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; *
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; *****************************************************************************/
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; <h> Stack Configuration
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; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Stack_Size EQU 0x00000400
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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Stack_Mem SPACE Stack_Size
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__initial_sp
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; <h> Heap Configuration
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; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Heap_Size EQU 0x00000000
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit
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PRESERVE8
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THUMB
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; Vector Table Mapped to Address 0 at Reset
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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EXPORT __Vectors_End
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EXPORT __Vectors_Size
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__Vectors DCD __initial_sp ; Top of Stack
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; NMI Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler ; SVCall Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD PendSV_Handler ; PendSV Handler
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DCD SysTick_Handler ; SysTick Handler
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; External Interrupts
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DCD Reserved16_IRQHandler ; Reserved interrupt 16
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DCD Reserved17_IRQHandler ; Reserved interrupt 17
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DCD Reserved18_IRQHandler ; Reserved interrupt 18
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DCD Reserved19_IRQHandler ; Reserved interrupt 19
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DCD Reserved20_IRQHandler ; Reserved interrupt 20
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DCD ETMRH_IRQHandler ; ETMRH command complete/read collision interrupt
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DCD LVD_LVW_IRQHandler ; Low Voltage Detect, Low Voltage Warning
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DCD IRQ_IRQHandler ; External interrupt
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DCD I2C0_IRQHandler ; I2C0 interrupt
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DCD Reserved25_IRQHandler ; Reserved interrupt 25
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DCD SPI0_IRQHandler ; SPI0 interrupt
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DCD SPI1_IRQHandler ; SPI1 interrupt
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DCD UART0_IRQHandler ; UART0 status/error interrupt
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DCD UART1_IRQHandler ; UART1 status/error interrupt
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DCD UART2_IRQHandler ; UART2 status/error interrupt
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DCD ADC0_IRQHandler ; ADC0 interrupt
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DCD ACMP0_IRQHandler ; ACMP0 interrupt
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DCD ETM0_IRQHandler ; ETM0 Single interrupt vector for all sources
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DCD ETM1_IRQHandler ; ETM1 Single interrupt vector for all sources
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DCD ETM2_IRQHandler ; ETM2 Single interrupt vector for all sources
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DCD RTC_IRQHandler ; RTC overflow
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DCD ACMP1_IRQHandler ; ACMP1 interrupt
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DCD PIT_CH0_IRQHandler ; PIT CH0 overflow
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DCD PIT_CH1_IRQHandler ; PIT CH1 overflow
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DCD KBI0_IRQHandler ; Keyboard interrupt 0
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DCD KBI1_IRQHandler ; Keyboard interrupt 1
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DCD Reserved42_IRQHandler ; Reserved interrupt 42
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DCD ICS_IRQHandler ; MCG interrupt
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DCD Watchdog_IRQHandler ; WDOG Interrupt
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DCD Reserved45_IRQHandler ; Reserved interrupt 45
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DCD Reserved46_IRQHandler ; Reserved interrupt 46
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DCD Reserved47_IRQHandler ; Reserved interrupt 47
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__Vectors_End
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__Vectors_Size EQU __Vectors_End - __Vectors
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; <h> Flash Configuration
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; <i> 16-byte flash configuration field that stores default protection settings (loaded on reset)
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; <i> and security information that allows the MCU to restrict acces to the FTFL module.
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; <h> Backdoor Comparison Key
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; <o0> Backdoor Key 0 <0x0-0xFF:2>
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; <o1> Backdoor Key 1 <0x0-0xFF:2>
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; <o2> Backdoor Key 2 <0x0-0xFF:2>
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; <o3> Backdoor Key 3 <0x0-0xFF:2>
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; <o4> Backdoor Key 4 <0x0-0xFF:2>
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; <o5> Backdoor Key 5 <0x0-0xFF:2>
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; <o6> Backdoor Key 6 <0x0-0xFF:2>
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; <o7> Backdoor Key 7 <0x0-0xFF:2>
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BackDoorK0 EQU 0xFF
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BackDoorK1 EQU 0xFF
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BackDoorK2 EQU 0xFF
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BackDoorK3 EQU 0xFF
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BackDoorK4 EQU 0xFF
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BackDoorK5 EQU 0xFF
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BackDoorK6 EQU 0xFF
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BackDoorK7 EQU 0xFF
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; </h>
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; <h> EEPROM Protection Register (EEPROT)
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; <i> The DFPROT register defines which D-Flash sectors are protected against program and erase operations.
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; <o.7> DPOPEN
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; <0=> Enables EEPROM memory protection
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; <1=> Disables EEPROM memory protection
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; <o.0..2> DPS
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; <0=> Flash address range: 0x00_0000 - 0x00_001F; protected size: 32 bytes
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; <1=> Flash address range: 0x00_0000 - 0x00_003F; protected size: 64 bytes
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; <2=> Flash address range: 0x00_0000 - 0x00_005F; protected size: 96 bytes
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; <3=> Flash address range: 0x00_0000 - 0x00_007F; protected size: 128 bytes
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; <4=> Flash address range: 0x00_0000 - 0x00_009F; protected size: 160 bytes
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; <5=> Flash address range: 0x00_0000 - 0x00_00BF; protected size: 192 bytes
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; <6=> Flash address range: 0x00_0000 - 0x00_00DF; protected size: 224 bytes
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; <7=> Flash address range: 0x00_0000 - 0x00_00FF; protected size: 256 bytes
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EEPROT EQU 0xFF
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; </h>
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; <h> FPROT
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; <i> P-Flash Protection Register
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; <o.7> FPOPEN
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; <0=> FPHDIS and FPLDIS bits define unprotected address ranges as specified by the corresponding FPHS and FPLS bits FPROT1.1
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; <1=> FPHDIS and FPLDIS bits enable protection for the address range specified by the corresponding FPHS and FPLS bits
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; <o.5> FPHDIS
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; <0=> Protection/Unprotection enabled
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; <1=> Protection/Unprotection disabled
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; <o.3..4> FPHS
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; <0=> Address range: 0x00_7C00-0x00_7FFF; protected size: 1 KB
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; <1=> Address range: 0x00_7800-0x00_7FFF; protected size: 2 KB
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; <2=> Address range: 0x00_7000-0x00_7FFF; protected size: 4 KB
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; <3=> Address range: 0x00_6000-0x00_7FFF; protected size: 8 KB
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; <o.5> FPLDIS
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; <0=> Protection/Unprotection enabled
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; <1=> Protection/Unprotection disabled
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; <o.3..4> FPLS
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; <0=> Address range: 0x00_0000-0x00_07FF; protected size: 2 KB
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; <1=> Address range: 0x00_0000-0x00_0FFF; protected size: 4 KB
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; <2=> Address range: 0x00_0000-0x00_1FFF; protected size: 8 KB
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; <3=> Address range: 0x00_0000-0x00_3FFF; protected size: 16 KB
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FPROT EQU 0xFF
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; </h>
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; </h>
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; <h> Flash security byte (FSEC)
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; <i> WARNING: If SEC field is configured as "MCU security status is secure" and MEEN field is configured as "Mass erase is disabled",
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; <i> MCU's security status cannot be set back to unsecure state since Mass erase via the debugger is blocked !!!
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; <o.0..1> SEC
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; <2=> MCU security status is unsecure
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; <3=> MCU security status is secure
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; <i> Flash Security
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; <i> This bits define the security state of the MCU.
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; <o.6..7> KEYEN
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; <2=> Backdoor key access enabled
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; <3=> Backdoor key access disabled
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; <i> Backdoor key Security Enable
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; <i> These bits enable and disable backdoor key access to the FTFL module.
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FSEC EQU 0xFE
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; </h>
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; <h> Flash Option Register (FOPT)
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FOPT EQU 0xFE
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; </h>
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IF :LNOT::DEF:RAM_TARGET
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AREA |.ARM.__at_0x400|, CODE, READONLY
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DCB BackDoorK0, BackDoorK1, BackDoorK2, BackDoorK3
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DCB BackDoorK4, BackDoorK5, BackDoorK6, BackDoorK7
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DCB 0xFF, 0xFF, 0xFF, 0xFF
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DCB EEPROT, FPROT, FSEC, FOPT ;Modified by ARM. DCB FPROT, EEPROT, FOPT, FSEC
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ENDIF
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AREA |.text|, CODE, READONLY
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; Reset Handler
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Reset_Handler PROC
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EXPORT Reset_Handler [WEAK]
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IMPORT SystemInit
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IMPORT __main
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LDR R0, =SystemInit
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BLX R0
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LDR R0, =__main
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BX R0
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ENDP
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; Dummy Exception Handlers (infinite loops which can be modified)
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NMI_Handler PROC
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EXPORT NMI_Handler [WEAK]
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B .
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ENDP
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HardFault_Handler\
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PROC
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EXPORT HardFault_Handler [WEAK]
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B .
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ENDP
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MemManage_Handler\
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PROC
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EXPORT MemManage_Handler [WEAK]
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B .
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ENDP
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BusFault_Handler\
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PROC
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EXPORT BusFault_Handler [WEAK]
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B .
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ENDP
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UsageFault_Handler\
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PROC
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EXPORT UsageFault_Handler [WEAK]
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B .
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ENDP
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SVC_Handler PROC
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EXPORT SVC_Handler [WEAK]
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B .
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ENDP
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DebugMon_Handler\
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PROC
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EXPORT DebugMon_Handler [WEAK]
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B .
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ENDP
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PendSV_Handler PROC
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EXPORT PendSV_Handler [WEAK]
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B .
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ENDP
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SysTick_Handler PROC
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EXPORT SysTick_Handler [WEAK]
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B .
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ENDP
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Default_Handler PROC
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EXPORT Reserved16_IRQHandler [WEAK]
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EXPORT Reserved17_IRQHandler [WEAK]
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EXPORT Reserved18_IRQHandler [WEAK]
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EXPORT Reserved19_IRQHandler [WEAK]
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EXPORT Reserved20_IRQHandler [WEAK]
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EXPORT ETMRH_IRQHandler [WEAK]
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EXPORT LVD_LVW_IRQHandler [WEAK]
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EXPORT IRQ_IRQHandler [WEAK]
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EXPORT I2C0_IRQHandler [WEAK]
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EXPORT Reserved25_IRQHandler [WEAK]
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EXPORT SPI0_IRQHandler [WEAK]
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EXPORT SPI1_IRQHandler [WEAK]
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EXPORT UART0_IRQHandler [WEAK]
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EXPORT UART1_IRQHandler [WEAK]
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EXPORT UART2_IRQHandler [WEAK]
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EXPORT ADC0_IRQHandler [WEAK]
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EXPORT ACMP0_IRQHandler [WEAK]
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EXPORT ETM0_IRQHandler [WEAK]
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EXPORT ETM1_IRQHandler [WEAK]
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EXPORT ETM2_IRQHandler [WEAK]
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EXPORT RTC_IRQHandler [WEAK]
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EXPORT ACMP1_IRQHandler [WEAK]
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EXPORT PIT_CH0_IRQHandler [WEAK]
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EXPORT PIT_CH1_IRQHandler [WEAK]
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EXPORT KBI0_IRQHandler [WEAK]
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EXPORT KBI1_IRQHandler [WEAK]
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EXPORT Reserved42_IRQHandler [WEAK]
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EXPORT ICS_IRQHandler [WEAK]
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EXPORT Watchdog_IRQHandler [WEAK]
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EXPORT Reserved45_IRQHandler [WEAK]
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EXPORT Reserved46_IRQHandler [WEAK]
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EXPORT Reserved47_IRQHandler [WEAK]
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EXPORT DefaultISR [WEAK]
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Reserved16_IRQHandler
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Reserved17_IRQHandler
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Reserved18_IRQHandler
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Reserved19_IRQHandler
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Reserved20_IRQHandler
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ETMRH_IRQHandler
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LVD_LVW_IRQHandler
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IRQ_IRQHandler
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I2C0_IRQHandler
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Reserved25_IRQHandler
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SPI0_IRQHandler
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SPI1_IRQHandler
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UART0_IRQHandler
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UART1_IRQHandler
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UART2_IRQHandler
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ADC0_IRQHandler
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ACMP0_IRQHandler
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ETM0_IRQHandler
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ETM1_IRQHandler
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ETM2_IRQHandler
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RTC_IRQHandler
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ACMP1_IRQHandler
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PIT_CH0_IRQHandler
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PIT_CH1_IRQHandler
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KBI0_IRQHandler
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KBI1_IRQHandler
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Reserved42_IRQHandler
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ICS_IRQHandler
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Watchdog_IRQHandler
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Reserved45_IRQHandler
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Reserved46_IRQHandler
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Reserved47_IRQHandler
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DefaultISR
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B .
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ENDP
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ALIGN
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; User Initial Stack & Heap
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IF :DEF:__MICROLIB
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EXPORT __initial_sp
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EXPORT __heap_base
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EXPORT __heap_limit
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ELSE
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IMPORT __use_two_region_memory
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EXPORT __user_initial_stackheap
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__user_initial_stackheap
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LDR R0, = Heap_Mem
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LDR R1, =(Stack_Mem + Stack_Size)
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LDR R2, = (Heap_Mem + Heap_Size)
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LDR R3, = Stack_Mem
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BX LR
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ALIGN
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ENDIF
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END
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