添加PAN159资料

2021-09-26 17:19:12 +08:00
parent 2109411cf7
commit 7fd213ef33
3783 changed files with 1783056 additions and 0 deletions
@@ -0,0 +1,176 @@
+/*******************************************************************************
+ * @note      Copyright (C) 2017 Shanghai Panchip Microelectronics Co., Ltd.
+ *            All rights reserved.
+ *
+ * @file      main.c
+ * @brief     
+ *
+ * @history - V1.0, 2018-01-19, huoweibin, first implementation.
+*******************************************************************************/
+#include <stdio.h>
+#include "Mini58Series.h"
+#include "user_softdelay.h"
+#include "lib_driver_adc_pan159.h"
+#include "lib_driver_delay_pan159.h"
+#include "lib_driver_flash_pan159.h"
+#include "lib_driver_gpio_pan159.h"
+//#include "lib_driver_iic_pan159.h"
+#include "lib_driver_swiic_pan159.h"
+#include "lib_driver_pwm_pan159.h"
+#include "lib_driver_rfspi_pan159.h"
+#include "lib_driver_uart_pan159.h"
+#include "lib_driver_timer_pan159.h"
+#include "lib_driver_wdt_pan159.h"
+#include "lib_driver_xn297l.h"
+//
+#include "bsp.h"
+
+uint32_t xx,yy;
+void SYS_Init(void)
+{
+    /* Unlock protected registers */
+    SYS_UnlockReg();
+
+		/* Enable external 12MHz XTAL, HIRC */
+    CLK->PWRCTL =  CLK_PWRCTL_HIRCEN_Msk;
+
+    /* Enable HIRC clock (Internal RC 22.1184MHz) */
+    CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN_Msk);
+    CLK_EnableXtalRC(CLK_PWRCTL_LIRCEN_Msk);
+    
+    /* Wait for HIRC clock ready */
+    CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
+
+    CLK->CLKSEL0 |= CLK_CLKSEL0_HCLKSEL_Msk;
+    CLK->CLKDIV &= (~CLK_CLKDIV_HCLKDIV_Msk);
+
+    /* Configure PLL setting if HXT clock is enabled */
+
+    CLK_EnablePLL(CLK_PLLCTL_PLLSRC_HIRC, (FREQ_50MHZ << 1));
+
+    CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_PLL, CLK_CLKDIV_HCLK(2));
+//    xx = CLK_SetCoreClock(50000000);
+
+
+    // Enable module clock
+    CLK_EnableModuleClock(UART0_MODULE);
+    //CLK_EnableModuleClock(UART1_MODULE);
+    CLK_EnableModuleClock(ADC_MODULE);
+    //CLK_SetModuleClock(ADC_MODULE,CLK_CLKSEL1_ADCSEL_HCLK,CLK_CLKDIV_ADC(6));
+    CLK_SetModuleClock(ADC_MODULE,CLK_CLKSEL1_ADCSEL_HCLK,CLK_CLKDIV_ADC(180)); /** 276.480kHzÊ±ÖÓ */
+    CLK_EnableModuleClock(PWMCH01_MODULE);
+    CLK_EnableModuleClock(PWMCH23_MODULE);
+
+    SystemCoreClockUpdate();
+    xx = CLK_GetPLLClockFreq();
+    yy = CLK_GetHCLKFreq();
+    /* Lock protected registers */
+		SYS_LockReg();
+		
+
+}
+uint16_t pwm_duty[4] = {100,400,600,800};
+uint16_t adc2_value[2];
+uint8_t somtingtest[3] = {0x12,0x32,0x44};
+uint8_t testdata[40] = {0x12,0x12,0x12,0x12,0x12,0x12,0x12,0x12,0x13,0x12,0x12,0x12,0x13,0x12,0x12,0x12,0x12,0x12,0x12,0x12,0x12,0x13,0x12,0x12,0x12,0x13,0x12,0x12,0x12,0x12,0x12,0x12,0x12,0x12,0x13,0x12,0x12,0x12,0x13,0x12};
+uint16_t sb;
+uint8_t count;
+
+uint8_t dat[0x40];
+void sometingtest(void)
+{
+    sb =1 ;
+}
+void sometingtest2(void)
+{
+    sb =2 ;
+    iic_start_read_bytes(0x76,0x10,dat,0x12,NULL,NULL);
+}
+
+int main()
+{
+    /* sys & clock */    
+    SYS_Init();
+    /* hardware i2c */    
+    iic_pan159_init();
+    /* hardware spi */  
+    rfspi_pan159_init();
+    /* hardware pwm */  
+    pwm_pan159_init(1);
+    /* adc */  
+    adc_pan159_init();
+    /* rf-297L */  
+    rf_init();
+    /* uart */
+    uart_init_pan159();
+    /* TIMER0 */ 
+    timer_pan159_init(500,sometingtest2);
+    printf("adc value is");
+  //below is for test
+    bsp_led_init();
+    while(1) {  
+      bsp_led_blink();
+      delay_ms(125);      
+    } //end while?
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  //above is for test
+    flash_pan159_erase(FMC_SPROM_BASE,1);
+    flash_pan159_write(FMC_SPROM_BASE,testdata,13);
+    flash_pan159_read(FMC_SPROM_BASE,testdata,13);
+    xn297l_tx_mode();
+    //pwm_pan159_setDuty(pwm_duty);
+    //DrvWDT_Init(WDT_TIMEOUT_2POW6);
+    while(1){
+        uart_send(somtingtest,3);
+        xn297l_tx_data(testdata,13);
+        adc_pan159_samp1(adc2_value);
+        //pwm_pan159_setDuty(pwm_duty);
+        count++;
+        switch(count){
+            case 1:
+                pwm_duty[1] = 200;
+                pwm_pan159_setDuty(pwm_duty);
+                break;
+            case 2:
+                pwm_duty[1] = 0;
+                pwm_pan159_setDuty(pwm_duty);
+                break;
+            case 3:
+                pwm_duty[1] = 800;
+                pwm_pan159_setDuty(pwm_duty);
+                count = 0;
+                break;
+            default :
+                count = 0;
+        }
+        uint8_t somting[5] = {0x89,2,3,4,5};
+        iic_start_send_bytes(0x76,0x0C,somting,1,NULL,NULL);
+        delay_ms(50);
+        
+        iic_start_read_bytes(0x76,0x10,dat,0x12,NULL,NULL);
+        delay_ms(1);
+        iic_start_read_bytes(0x76,0x10,dat,0x12,NULL,NULL);
+        delay_ms(1);
+        
+        iic_start_read_bytes(0x76,0x10,dat,0x12,NULL,NULL);
+        delay_ms(1);
+        iic_start_read_bytes(0x76,0x10,dat,0x30,sometingtest,sometingtest);
+        //(I2C0)->CTL |= (I2C_CTL_SI_Msk | I2C_CTL_STO_Msk);
+        __disable_irq();
+//        flash_pan159_erase(FMC_SPROM_BASE,1);
+//        flash_pan159_write(FMC_SPROM_BASE,testdata,40);
+//        flash_pan159_read(FMC_SPROM_BASE,testdata,40);
+		__enable_irq();
+        }
+
+}
+
+/*** (C) COPYRIGHT 2015 Nuvoton Technology Corp. ***/