添加PAN159资料
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;/******************************************************************************
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; * @file startup_Mini58Series.s
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; * @version V1.00
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; * $Revision: 2 $
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; * $Date: 15/05/26 10:11a $
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; * @brief CMSIS ARM Cortex-M0 Core Device Startup File
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; *
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; * @note
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; * Copyright (C) 2015 Nuvoton Technology Corp. All rights reserved.
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;*****************************************************************************/
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IF :LNOT: :DEF: Stack_Size
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Stack_Size EQU 0x00000200
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ENDIF
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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Stack_Mem SPACE Stack_Size
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__initial_sp
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; <h> Heap Configuration
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; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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IF :LNOT: :DEF: Heap_Size
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Heap_Size EQU 0x00000000
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ENDIF
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit
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PRESERVE8
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THUMB
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; Vector Table Mapped to Address 0 at Reset
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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__Vectors DCD __initial_sp ; Top of Stack
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; NMI Handler
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DCD HardFault_Handler ; Hard Fault Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler ; SVCall Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD PendSV_Handler ; PendSV Handler
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DCD SysTick_Handler ; SysTick Handler
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; External Interrupts
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; maximum of 32 External Interrupts are possible
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DCD BOD_IRQHandler
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DCD WDT_IRQHandler
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DCD EINT0_IRQHandler
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DCD EINT1_IRQHandler
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DCD GPIO01_IRQHandler
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DCD GPIO234_IRQHandler
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DCD PWM_IRQHandler
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DCD FB_IRQHandler
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DCD TMR0_IRQHandler
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DCD TMR1_IRQHandler
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DCD Default_Handler
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DCD Default_Handler
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DCD UART0_IRQHandler
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DCD UART1_IRQHandler
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DCD SPI_IRQHandler
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DCD Default_Handler
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DCD GPIO5_IRQHandler
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DCD HIRC_IRQHandler
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DCD I2C0_IRQHandler
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DCD I2C1_IRQHandler
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DCD Default_Handler
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DCD Default_Handler
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DCD Default_Handler
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DCD Default_Handler
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DCD Default_Handler
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DCD ACMP_IRQHandler
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DCD Default_Handler
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DCD Default_Handler
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DCD PDWU_IRQHandler
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DCD ADC_IRQHandler
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DCD Default_Handler
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DCD Default_Handler
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AREA |.text|, CODE, READONLY
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; Reset Handler
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ENTRY
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Reset_Handler PROC
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EXPORT Reset_Handler [WEAK]
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IMPORT __main
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LDR R0, =__main
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BX R0
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ENDP
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; Dummy Exception Handlers (infinite loops which can be modified)
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NMI_Handler PROC
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EXPORT NMI_Handler [WEAK]
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B .
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ENDP
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HardFault_Handler\
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PROC
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EXPORT HardFault_Handler [WEAK]
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B .
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ENDP
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SVC_Handler PROC
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EXPORT SVC_Handler [WEAK]
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B .
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ENDP
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PendSV_Handler PROC
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EXPORT PendSV_Handler [WEAK]
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B .
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ENDP
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SysTick_Handler PROC
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EXPORT SysTick_Handler [WEAK]
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B .
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ENDP
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Default_Handler PROC
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EXPORT BOD_IRQHandler [WEAK]
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EXPORT WDT_IRQHandler [WEAK]
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EXPORT EINT0_IRQHandler [WEAK]
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EXPORT EINT1_IRQHandler [WEAK]
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EXPORT GPIO01_IRQHandler [WEAK]
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EXPORT GPIO234_IRQHandler [WEAK]
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EXPORT PWM_IRQHandler [WEAK]
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EXPORT FB_IRQHandler [WEAK]
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EXPORT TMR0_IRQHandler [WEAK]
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EXPORT TMR1_IRQHandler [WEAK]
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EXPORT UART0_IRQHandler [WEAK]
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EXPORT UART1_IRQHandler [WEAK]
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EXPORT SPI_IRQHandler [WEAK]
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EXPORT GPIO5_IRQHandler [WEAK]
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EXPORT HIRC_IRQHandler [WEAK]
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EXPORT I2C0_IRQHandler [WEAK]
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EXPORT I2C1_IRQHandler [WEAK]
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EXPORT ACMP_IRQHandler [WEAK]
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EXPORT PDWU_IRQHandler [WEAK]
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EXPORT ADC_IRQHandler [WEAK]
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BOD_IRQHandler
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WDT_IRQHandler
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EINT0_IRQHandler
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EINT1_IRQHandler
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GPIO01_IRQHandler
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GPIO234_IRQHandler
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PWM_IRQHandler
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FB_IRQHandler
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TMR0_IRQHandler
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TMR1_IRQHandler
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UART0_IRQHandler
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UART1_IRQHandler
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SPI_IRQHandler
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GPIO5_IRQHandler
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HIRC_IRQHandler
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I2C0_IRQHandler
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I2C1_IRQHandler
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ACMP_IRQHandler
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PDWU_IRQHandler
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ADC_IRQHandler
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B .
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ENDP
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ALIGN
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; User Initial Stack & Heap
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IF :DEF:__MICROLIB
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EXPORT __initial_sp
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EXPORT __heap_base
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EXPORT __heap_limit
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ELSE
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IMPORT __use_two_region_memory
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EXPORT __user_initial_stackheap
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__user_initial_stackheap
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LDR R0, = Heap_Mem
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LDR R1, = (Stack_Mem + Stack_Size)
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LDR R2, = (Heap_Mem + Heap_Size)
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LDR R3, = Stack_Mem
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BX LR
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ALIGN
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ENDIF
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END
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;/*** (C) COPYRIGHT 2015 Nuvoton Technology Corp. ***/
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+149
@@ -0,0 +1,149 @@
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;/******************************************************************************
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; * @file startup_Mini58Series.s
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; * @version V1.00
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; * $Revision: 3 $
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; * $Date: 16/06/07 2:36p $
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; * @brief CMSIS ARM Cortex-M0 Core Device Startup File
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; *
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; * @note
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; * Copyright (C) 2015 Nuvoton Technology Corp. All rights reserved.
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;*****************************************************************************/
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MODULE ?cstartup
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;; Forward declaration of sections.
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SECTION CSTACK:DATA:NOROOT(3) ;; 8 bytes alignment
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SECTION .intvec:CODE:NOROOT(2);; 4 bytes alignment
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EXTERN __iar_program_start
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EXTERN HardFault_Handler
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PUBLIC __vector_table
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DATA
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__vector_table
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DCD sfe(CSTACK)
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DCD Reset_Handler
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DCD NMI_Handler
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DCD HardFault_Handler
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD SVC_Handler
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DCD 0
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DCD 0
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DCD PendSV_Handler
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DCD SysTick_Handler
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; External Interrupts
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DCD BOD_IRQHandler ; Brownout low voltage detected interrupt
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DCD WDT_IRQHandler ; Watch Dog Timer interrupt
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DCD EINT0_IRQHandler ; External signal interrupt from PB.14 pin
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DCD EINT1_IRQHandler ; External signal interrupt from PB.15 pin
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DCD GPIO01_IRQHandler ; External signal interrupt from P0[7:0] / P1[7:0]
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DCD GPIO234_IRQHandler ; External interrupt from P2[7:0]/P3[7:0]/P4[7:0]
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DCD PWM_IRQHandler ; PWM interrupt
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DCD FB_IRQHandler
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DCD TMR0_IRQHandler ; Timer 0 interrupt
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DCD TMR1_IRQHandler ; Timer 1 interrupt
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DCD Default_Handler
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DCD Default_Handler
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DCD UART0_IRQHandler ; UART0 interrupt
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DCD UART1_IRQHandler ; UART1 interrupt
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DCD SPI_IRQHandler ; SPI interrupt
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DCD Default_Handler
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DCD GPIO5_IRQHandler ; GP5[7:0] interrupt
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DCD HIRC_IRQHandler ; HIRC interrupt
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DCD I2C0_IRQHandler ; I2C0 interrupt
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DCD I2C1_IRQHandler ; I2C1 interrupt
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DCD Default_Handler
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DCD Default_Handler
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DCD Default_Handler
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DCD Default_Handler
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DCD Default_Handler
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DCD ACMP_IRQHandler
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DCD Default_Handler
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DCD Default_Handler
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DCD PDWU_IRQHandler
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DCD ADC_IRQHandler ; ADC interrupt
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DCD Default_Handler
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DCD Default_Handler
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;
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;; Default interrupt handlers.
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;;
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THUMB
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PUBWEAK Reset_Handler
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SECTION .text:CODE:REORDER:NOROOT(2) ; 4 bytes alignment
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Reset_Handler
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LDR R0, =__iar_program_start
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BX R0
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PUBWEAK NMI_Handler
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PUBWEAK SVC_Handler
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PUBWEAK PendSV_Handler
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PUBWEAK SysTick_Handler
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PUBWEAK BOD_IRQHandler
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PUBWEAK WDT_IRQHandler
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PUBWEAK EINT0_IRQHandler
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PUBWEAK EINT1_IRQHandler
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PUBWEAK GPIO01_IRQHandler
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PUBWEAK GPIO234_IRQHandler
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PUBWEAK PWM_IRQHandler
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PUBWEAK FB_IRQHandler
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PUBWEAK TMR0_IRQHandler
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PUBWEAK TMR1_IRQHandler
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PUBWEAK UART0_IRQHandler
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PUBWEAK UART1_IRQHandler
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PUBWEAK SPI_IRQHandler
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PUBWEAK GPIO5_IRQHandler
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PUBWEAK HIRC_IRQHandler
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PUBWEAK I2C0_IRQHandler
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PUBWEAK I2C1_IRQHandler
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PUBWEAK ACMP_IRQHandler
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PUBWEAK PDWU_IRQHandler
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PUBWEAK ADC_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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NMI_Handler
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SVC_Handler
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PendSV_Handler
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SysTick_Handler
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BOD_IRQHandler
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WDT_IRQHandler
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EINT0_IRQHandler
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EINT1_IRQHandler
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GPIO01_IRQHandler
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GPIO234_IRQHandler
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PWM_IRQHandler
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FB_IRQHandler
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TMR0_IRQHandler
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TMR1_IRQHandler
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UART0_IRQHandler
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UART1_IRQHandler
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SPI_IRQHandler
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GPIO5_IRQHandler
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HIRC_IRQHandler
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I2C0_IRQHandler
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I2C1_IRQHandler
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ACMP_IRQHandler
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PDWU_IRQHandler
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ADC_IRQHandler
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Default_Handler
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B Default_Handler
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END
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;/*** (C) COPYRIGHT 2015 Nuvoton Technology Corp. ***/
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+89
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/**************************************************************************//**
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* @file system_Mini58Series.c
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* @version V1.00
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* $Revision: 3 $
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* $Date: 15/02/13 9:13a $
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* @brief Mini58 series system clock init code and assert handler
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*
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* @note
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* Copyright (C) 2015 Nuvoton Technology Corp. All rights reserved.
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*****************************************************************************/
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#include <stdint.h>
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#include "Mini58Series.h"
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/*----------------------------------------------------------------------------
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Clock Variable definitions
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*----------------------------------------------------------------------------*/
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uint32_t __HSI = __HIRC; /*!< Factory Default is internal high speed RC 44.2368M divided by 2 */
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uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
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uint32_t PllClock = __HIRC; /*!< PLL Output Clock Frequency */
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uint32_t CyclesPerUs; /*!< Cycles per micro second */
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/**
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* @brief Check HIRC clock rate feed to HCLK
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*
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* @return none
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*/
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void SystemInit (void)
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{
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}
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/**
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* @brief This function is used to update the variable SystemCoreClock
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* and must be called whenever the core clock is changed.
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* @param None.
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* @retval None.
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*/
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void SystemCoreClockUpdate (void)
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{
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uint32_t u32CoreFreq, u32ClkSrc;
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/* Update PLL Clock */
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PllClock = CLK_GetPLLClockFreq();
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u32ClkSrc = CLK->CLKSEL0 & CLK_CLKSEL0_HCLKSEL_Msk;
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if (u32ClkSrc == 0)
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u32CoreFreq = __XTAL; /* External crystal clock */
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else if (u32ClkSrc ==2)
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u32CoreFreq = PllClock; /* PLL clock */
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else if (u32ClkSrc == 3)
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u32CoreFreq = __IRC10K; /* Internal 10K crystal clock */
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else if (u32ClkSrc == 7)
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u32CoreFreq = __HIRC; /* Factory Default is internal RC */
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else
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u32CoreFreq = __HIRC; /* unknown value, use Factory Default is internal RC */
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SystemCoreClock = (u32CoreFreq/((CLK->CLKDIV & CLK_CLKDIV_HCLKDIV_Msk) + 1));
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CyclesPerUs = (SystemCoreClock + 500000) / 1000000;
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}
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#if USE_ASSERT
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/**
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* @brief Assert Error Message
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*
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* @param[in] file the source file name
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* @param[in] line line number
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*
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* @return None
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*
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* @details The function prints the source file name and line number where
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* the ASSERT_PARAM() error occurs, and then stops in an infinite loop.
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*/
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void AssertError(uint8_t * file, uint32_t line)
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{
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printf("[%s] line %d : wrong parameters.\r\n", file, line);
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/* Infinite loop */
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while(1) ;
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}
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#endif
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/*** (C) COPYRIGHT 2015 Nuvoton Technology Corp. ***/
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