添加PAN159资料
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/****************************************************************************************************//**
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* @file ARM_Example.h
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*
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* @brief CMSIS Cortex-M3 Peripheral Access Layer Header File for
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* ARM_Example from ARM Ltd..
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*
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* @version V1.2
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* @date 16. April 2014
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*
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* @note Generated with SVDConv V2.81e
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* from CMSIS SVD File 'ARM_Example.svd' Version 1.2,
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*
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* @par ARM Limited (ARM) is supplying this software for use with Cortex-M
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* processor based microcontroller, but can be equally used for other
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* suitable processor architectures. This file can be freely distributed.
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* Modifications to this file shall be clearly marked.
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*
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* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
|
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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*
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*******************************************************************************************************/
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/** @addtogroup ARM Ltd.
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* @{
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*/
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/** @addtogroup ARM_Example
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* @{
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*/
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#ifndef ARM_EXAMPLE_H
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#define ARM_EXAMPLE_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* ------------------------- Interrupt Number Definition ------------------------ */
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typedef enum {
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/* ------------------- Cortex-M3 Processor Exceptions Numbers ------------------- */
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Reset_IRQn = -15, /*!< 1 Reset Vector, invoked on Power up and warm reset */
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NonMaskableInt_IRQn = -14, /*!< 2 Non maskable Interrupt, cannot be stopped or preempted */
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HardFault_IRQn = -13, /*!< 3 Hard Fault, all classes of Fault */
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MemoryManagement_IRQn = -12, /*!< 4 Memory Management, MPU mismatch, including Access Violation
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and No Match */
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BusFault_IRQn = -11, /*!< 5 Bus Fault, Pre-Fetch-, Memory Access Fault, other address/memory
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related Fault */
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UsageFault_IRQn = -10, /*!< 6 Usage Fault, i.e. Undef Instruction, Illegal State Transition */
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SVCall_IRQn = -5, /*!< 11 System Service Call via SVC instruction */
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DebugMonitor_IRQn = -4, /*!< 12 Debug Monitor */
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PendSV_IRQn = -2, /*!< 14 Pendable request for system service */
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SysTick_IRQn = -1, /*!< 15 System Tick Timer */
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/* ------------------- ARM_Example Specific Interrupt Numbers ------------------- */
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TIMER0_IRQn = 0, /*!< 0 TIMER0 */
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TIMER1_IRQn = 4, /*!< 4 TIMER1 */
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TIMER2_IRQn = 6 /*!< 6 TIMER2 */
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} IRQn_Type;
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/** @addtogroup Configuration_of_CMSIS
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* @{
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*/
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/* ================================================================================ */
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/* ================ Processor and Core Peripheral Section ================ */
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/* ================================================================================ */
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/* ----------------Configuration of the Cortex-M3 Processor and Core Peripherals---------------- */
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#define __CM3_REV 0x0100 /*!< Cortex-M3 Core Revision */
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#define __MPU_PRESENT 1 /*!< MPU present or not */
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#define __NVIC_PRIO_BITS 3 /*!< Number of Bits used for Priority Levels */
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#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
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/** @} */ /* End of group Configuration_of_CMSIS */
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#include "core_cm3.h" /*!< Cortex-M3 processor and core peripherals */
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#include "system_ARMCM3.h" /*!< ARM_Example System */
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/* ================================================================================ */
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/* ================ Device Specific Peripheral Section ================ */
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/* ================================================================================ */
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/** @addtogroup Device_Peripheral_Registers
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* @{
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*/
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/* ------------------- Start of section using anonymous unions ------------------ */
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#if defined(__CC_ARM)
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#pragma push
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#pragma anon_unions
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#elif defined(__ICCARM__)
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#pragma language=extended
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#elif defined(__GNUC__)
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/* anonymous unions are enabled by default */
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#elif defined(__TMS470__)
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/* anonymous unions are enabled by default */
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#elif defined(__TASKING__)
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#pragma warning 586
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#else
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#warning Not supported compiler type
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#endif
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/* ================================================================================ */
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/* ================ TIMER0 ================ */
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/* ================================================================================ */
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/**
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* @brief 32 Timer / Counter, counting up or down from different sources (TIMER0)
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*/
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typedef struct { /*!< TIMER0 Structure */
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__IO uint32_t CR; /*!< Control Register */
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__IO uint16_t SR; /*!< Status Register */
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__I uint16_t RESERVED0[5];
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__IO uint16_t INT; /*!< Interrupt Register */
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__I uint16_t RESERVED1[7];
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__IO uint32_t COUNT; /*!< The Counter Register reflects the actual Value of the Timer/Counter */
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__IO uint32_t MATCH; /*!< The Match Register stores the compare Value for the MATCH condition */
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union {
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__O uint32_t PRESCALE_WR; /*!< The Prescale Register stores the Value for the prescaler. The
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cont event gets divided by this value */
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__I uint32_t PRESCALE_RD; /*!< The Prescale Register stores the Value for the prescaler. The
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cont event gets divided by this value */
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};
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__I uint32_t RESERVED2[9];
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__IO uint32_t RELOAD[4]; /*!< The Reload Register stores the Value the COUNT Register gets
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reloaded on a when a condition was met. */
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} TIMER0_Type;
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/* -------------------- End of section using anonymous unions ------------------- */
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#if defined(__CC_ARM)
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#pragma pop
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#elif defined(__ICCARM__)
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/* leave anonymous unions enabled */
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#elif defined(__GNUC__)
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/* anonymous unions are enabled by default */
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#elif defined(__TMS470__)
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/* anonymous unions are enabled by default */
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#elif defined(__TASKING__)
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#pragma warning restore
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#else
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#warning Not supported compiler type
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#endif
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/* ================================================================================ */
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/* ================ Peripheral memory map ================ */
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/* ================================================================================ */
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#define TIMER0_BASE 0x40010000UL
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#define TIMER1_BASE 0x40010100UL
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#define TIMER2_BASE 0x40010200UL
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/* ================================================================================ */
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/* ================ Peripheral declaration ================ */
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/* ================================================================================ */
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#define TIMER0 ((TIMER0_Type *) TIMER0_BASE)
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#define TIMER1 ((TIMER0_Type *) TIMER1_BASE)
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#define TIMER2 ((TIMER0_Type *) TIMER2_BASE)
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/** @} */ /* End of group Device_Peripheral_Registers */
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/** @} */ /* End of group ARM_Example */
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/** @} */ /* End of group ARM Ltd. */
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#ifdef __cplusplus
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}
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#endif
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#endif /* ARM_Example_H */
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@@ -0,0 +1,786 @@
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<?xml version="1.0" encoding="utf-8"?>
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<!-- File naming: <part/series name>.svd -->
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<!--
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Copyright (C) 2012-2014 ARM Limited. All rights reserved.
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Purpose: System Viewer Description (SVD) Example (Schema Version 1.1)
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This is a description of a none-existent and incomplete device
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for demonstration purposes only.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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- Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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- Neither the name of ARM nor the names of its contributors may be used
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to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
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POSSIBILITY OF SUCH DAMAGE.
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-->
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<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD.xsd" >
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<vendor>ARM Ltd.</vendor> <!-- device vendor name -->
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<vendorID>ARM</vendorID> <!-- device vendor short name -->
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<name>ARM_Example</name> <!-- name of part-->
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<series>ARMCM3</series> <!-- device series the device belongs to -->
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<version>1.2</version> <!-- version of this description, adding CMSIS-SVD 1.1 tags -->
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<description>ARM 32-bit Cortex-M3 Microcontroller based device, CPU clock up to 80MHz, etc. </description>
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<licenseText> <!-- this license text will appear in header file. \n force line breaks -->
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ARM Limited (ARM) is supplying this software for use with Cortex-M\n
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processor based microcontroller, but can be equally used for other\n
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suitable processor architectures. This file can be freely distributed.\n
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Modifications to this file shall be clearly marked.\n
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\n
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THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED\n
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OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\n
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MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\n
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ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\n
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CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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</licenseText>
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<cpu> <!-- details about the cpu embedded in the device -->
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<name>CM3</name>
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<revision>r1p0</revision>
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<endian>little</endian>
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<mpuPresent>true</mpuPresent>
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<fpuPresent>false</fpuPresent>
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<nvicPrioBits>3</nvicPrioBits>
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<vendorSystickConfig>false</vendorSystickConfig>
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</cpu>
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<addressUnitBits>8</addressUnitBits> <!-- byte addressable memory -->
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<width>32</width> <!-- bus width is 32 bits -->
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<!-- default settings implicitly inherited by subsequent sections -->
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<size>32</size> <!-- this is the default size (number of bits) of all peripherals
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and register that do not define "size" themselves -->
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<access>read-write</access> <!-- default access permission for all subsequent registers -->
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<resetValue>0x00000000</resetValue> <!-- by default all bits of the registers are initialized to 0 on reset -->
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<resetMask>0xFFFFFFFF</resetMask> <!-- by default all 32Bits of the registers are used -->
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<peripherals>
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<!-- Timer 0 -->
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<peripheral>
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<name>TIMER0</name>
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<version>1.0</version>
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<description>32 Timer / Counter, counting up or down from different sources</description>
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<groupName>TIMER</groupName>
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<baseAddress>0x40010000</baseAddress>
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<size>32</size>
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<access>read-write</access>
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<addressBlock>
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<offset>0</offset>
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<size>0x100</size>
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<usage>registers</usage>
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</addressBlock>
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<interrupt>
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<name>TIMER0</name>
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<value>0</value>
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</interrupt>
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<registers>
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<!-- CR: Control Register -->
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<register>
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<name>CR</name>
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<description>Control Register</description>
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<addressOffset>0x00</addressOffset>
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<size>32</size>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0x1337F7F</resetMask>
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<fields>
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<!-- EN: Enable -->
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<field>
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<name>EN</name>
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<description>Enable</description>
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<bitRange>[0:0]</bitRange>
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<access>read-write</access>
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<enumeratedValues>
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<enumeratedValue>
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<name>Disable</name>
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<description>Timer is disabled and does not operate</description>
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<value>0</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>Enable</name>
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<description>Timer is enabled and can operate</description>
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<value>1</value>
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</enumeratedValue>
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</enumeratedValues>
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</field>
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<!-- RST: Reset -->
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<field>
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<name>RST</name>
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<description>Reset Timer</description>
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<bitRange>[1:1]</bitRange>
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<access>write-only</access>
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<enumeratedValues>
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<enumeratedValue>
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<name>No_Action</name>
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<description>Write as ZERO if necessary</description>
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<value>0</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>Reset_Timer</name>
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<description>Reset the Timer</description>
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<value>1</value>
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</enumeratedValue>
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</enumeratedValues>
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</field>
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<!-- CNT: Counting Direction -->
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<field>
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<name>CNT</name>
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<description>Counting direction</description>
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<bitRange>[3:2]</bitRange>
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<access>read-write</access>
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<enumeratedValues>
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<enumeratedValue>
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<name>Count_UP</name>
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<description>Timer Counts UO and wraps, if no STOP condition is set</description>
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<value>0</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>Count_DOWN</name>
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<description>Timer Counts DOWN and wraps, if no STOP condition is set</description>
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<value>1</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>Toggle</name>
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<description>Timer Counts up to MAX, then DOWN to ZERO, if no STOP condition is set</description>
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<value>2</value>
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</enumeratedValue>
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</enumeratedValues>
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</field>
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<!-- MODE: Operation Mode -->
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<field>
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<name>MODE</name>
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<description>Operation Mode</description>
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<bitRange>[6:4]</bitRange>
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<access>read-write</access>
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<enumeratedValues>
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<enumeratedValue>
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<name>Continous</name>
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<description>Timer runs continously</description>
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<value>0</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>Single_ZERO_MAX</name>
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<description>Timer counts to 0x00 or 0xFFFFFFFF (depending on CNT) and stops</description>
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<value>1</value>
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</enumeratedValue>
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||||
<enumeratedValue>
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||||
<name>Single_MATCH</name>
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<description>Timer counts to the Value of MATCH Register and stops</description>
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<value>2</value>
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||||
</enumeratedValue>
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||||
<enumeratedValue>
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<name>Reload_ZERO_MAX</name>
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<description>Timer counts to 0x00 or 0xFFFFFFFF (depending on CNT), loads the RELOAD Value and continues</description>
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||||
<value>3</value>
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||||
</enumeratedValue>
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||||
<enumeratedValue>
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||||
<name>Reload_MATCH</name>
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||||
<description>Timer counts to the Value of MATCH Register, loads the RELOAD Value and continues</description>
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||||
<value>4</value>
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||||
</enumeratedValue>
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||||
</enumeratedValues>
|
||||
</field>
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||||
|
||||
<!-- PSC: Use Prescaler -->
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||||
<field>
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||||
<name>PSC</name>
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||||
<description>Use Prescaler</description>
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||||
<bitRange>[7:7]</bitRange>
|
||||
<access>read-write</access>
|
||||
<enumeratedValues>
|
||||
<enumeratedValue>
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||||
<name>Disabled</name>
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||||
<description>Prescaler is not used</description>
|
||||
<value>0</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>Enabled</name>
|
||||
<description>Prescaler is used as divider</description>
|
||||
<value>1</value>
|
||||
</enumeratedValue>
|
||||
</enumeratedValues>
|
||||
</field>
|
||||
|
||||
<!-- CNTSRC: Timer / Counter Soruce Divider -->
|
||||
<field>
|
||||
<name>CNTSRC</name>
|
||||
<description>Timer / Counter Source Divider</description>
|
||||
<bitRange>[11:8]</bitRange>
|
||||
<access>read-write</access>
|
||||
<enumeratedValues>
|
||||
<enumeratedValue>
|
||||
<name>CAP_SRC</name>
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||||
<description>Capture Source is used directly</description>
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||||
<value>0</value>
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||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>CAP_SRC_div2</name>
|
||||
<description>Capture Source is divided by 2</description>
|
||||
<value>1</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>CAP_SRC_div4</name>
|
||||
<description>Capture Source is divided by 4</description>
|
||||
<value>2</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>CAP_SRC_div8</name>
|
||||
<description>Capture Source is divided by 8</description>
|
||||
<value>3</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>CAP_SRC_div16</name>
|
||||
<description>Capture Source is divided by 16</description>
|
||||
<value>4</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>CAP_SRC_div32</name>
|
||||
<description>Capture Source is divided by 32</description>
|
||||
<value>5</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>CAP_SRC_div64</name>
|
||||
<description>Capture Source is divided by 64</description>
|
||||
<value>6</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>CAP_SRC_div128</name>
|
||||
<description>Capture Source is divided by 128</description>
|
||||
<value>7</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>CAP_SRC_div256</name>
|
||||
<description>Capture Source is divided by 256</description>
|
||||
<value>8</value>
|
||||
</enumeratedValue>
|
||||
</enumeratedValues>
|
||||
</field>
|
||||
|
||||
<!-- CAPSRC: Timer / COunter Capture Source -->
|
||||
<field>
|
||||
<name>CAPSRC</name>
|
||||
<description>Timer / Counter Capture Source</description>
|
||||
<bitRange>[15:12]</bitRange>
|
||||
<access>read-write</access>
|
||||
<enumeratedValues>
|
||||
<enumeratedValue>
|
||||
<name>CClk</name>
|
||||
<description>Core Clock</description>
|
||||
<value>0</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>GPIOA_0</name>
|
||||
<description>GPIO A, PIN 0</description>
|
||||
<value>1</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>GPIOA_1</name>
|
||||
<description>GPIO A, PIN 1</description>
|
||||
<value>2</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>GPIOA_2</name>
|
||||
<description>GPIO A, PIN 2</description>
|
||||
<value>3</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>GPIOA_3</name>
|
||||
<description>GPIO A, PIN 3</description>
|
||||
<value>4</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>GPIOA_4</name>
|
||||
<description>GPIO A, PIN 4</description>
|
||||
<value>5</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>GPIOA_5</name>
|
||||
<description>GPIO A, PIN 5</description>
|
||||
<value>6</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>GPIOA_6</name>
|
||||
<description>GPIO A, PIN 6</description>
|
||||
<value>7</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>GPIOA_7</name>
|
||||
<description>GPIO A, PIN 7</description>
|
||||
<value>8</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>GPIOB_0</name>
|
||||
<description>GPIO B, PIN 0</description>
|
||||
<value>9</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>GPIOB_1</name>
|
||||
<description>GPIO B, PIN 1</description>
|
||||
<value>10</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>GPIOB_2</name>
|
||||
<description>GPIO B, PIN 2</description>
|
||||
<value>11</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>GPIOB_3</name>
|
||||
<description>GPIO B, PIN 3</description>
|
||||
<value>12</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>GPIOC_0</name>
|
||||
<description>GPIO C, PIN 0</description>
|
||||
<value>13</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>GPIOC_5</name>
|
||||
<description>GPIO C, PIN 1</description>
|
||||
<value>14</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>GPIOC_6</name>
|
||||
<description>GPIO C, PIN 2</description>
|
||||
<value>15</value>
|
||||
</enumeratedValue>
|
||||
</enumeratedValues>
|
||||
</field>
|
||||
|
||||
<!-- CAPEDGE: Capture Edge -->
|
||||
<field>
|
||||
<name>CAPEDGE</name>
|
||||
<description>Capture Edge, select which Edge should result in a counter increment or decrement</description>
|
||||
<bitRange>[17:16]</bitRange>
|
||||
<access>read-write</access>
|
||||
<enumeratedValues>
|
||||
<enumeratedValue>
|
||||
<name>RISING</name>
|
||||
<description>Only rising edges result in a counter increment or decrement</description>
|
||||
<value>0</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>FALLING</name>
|
||||
<description>Only falling edges result in a counter increment or decrement</description>
|
||||
<value>1</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>BOTH</name>
|
||||
<description>Rising and falling edges result in a counter increment or decrement</description>
|
||||
<value>2</value>
|
||||
</enumeratedValue>
|
||||
</enumeratedValues>
|
||||
</field>
|
||||
|
||||
<!-- TRGEXT: Triggers an other Peripheral -->
|
||||
<field>
|
||||
<name>TRGEXT</name>
|
||||
<description>Triggers an other Peripheral</description>
|
||||
<bitRange>[21:20]</bitRange>
|
||||
<access>read-write</access>
|
||||
<enumeratedValues>
|
||||
<enumeratedValue>
|
||||
<name>NONE</name>
|
||||
<description>No Trigger is emitted</description>
|
||||
<value>0</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>DMA1</name>
|
||||
<description>DMA Controller 1 is triggered, dependant on MODE</description>
|
||||
<value>1</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>DMA2</name>
|
||||
<description>DMA Controller 2 is triggered, dependant on MODE</description>
|
||||
<value>2</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>UART</name>
|
||||
<description>UART is triggered, dependant on MODE</description>
|
||||
<value>3</value>
|
||||
</enumeratedValue>
|
||||
</enumeratedValues>
|
||||
</field>
|
||||
|
||||
<!-- Reload: Selects Reload Register n -->
|
||||
<field>
|
||||
<name>RELOAD</name>
|
||||
<description>Select RELOAD Register n to reload Timer on condition</description>
|
||||
<bitRange>[25:24]</bitRange>
|
||||
<access>read-write</access>
|
||||
<enumeratedValues>
|
||||
<enumeratedValue>
|
||||
<name>RELOAD0</name>
|
||||
<description>Selects Reload Register number 0</description>
|
||||
<value>0</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>RELOAD1</name>
|
||||
<description>Selects Reload Register number 1</description>
|
||||
<value>1</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>RELOAD2</name>
|
||||
<description>Selects Reload Register number 2</description>
|
||||
<value>2</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>RELOAD3</name>
|
||||
<description>Selects Reload Register number 3</description>
|
||||
<value>3</value>
|
||||
</enumeratedValue>
|
||||
</enumeratedValues>
|
||||
</field>
|
||||
|
||||
<!-- IDR: Inc or dec Reload Register Selection -->
|
||||
<field>
|
||||
<name>IDR</name>
|
||||
<description>Selects, if Reload Register number is incremented, decremented or not modified</description>
|
||||
<bitRange>[27:26]</bitRange>
|
||||
<access>read-write</access>
|
||||
<enumeratedValues>
|
||||
<enumeratedValue>
|
||||
<name>KEEP</name>
|
||||
<description>Reload Register number does not change automatically</description>
|
||||
<value>0</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>INCREMENT</name>
|
||||
<description>Reload Register number is incremented on each match</description>
|
||||
<value>1</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>DECREMENT</name>
|
||||
<description>Reload Register number is decremented on each match</description>
|
||||
<value>2</value>
|
||||
</enumeratedValue>
|
||||
</enumeratedValues>
|
||||
</field>
|
||||
|
||||
<!-- START: Starts / Stops the Timer/Counter -->
|
||||
<field>
|
||||
<name>S</name>
|
||||
<description>Starts and Stops the Timer / Counter</description>
|
||||
<bitRange>[31:31]</bitRange>
|
||||
<access>read-write</access>
|
||||
<enumeratedValues>
|
||||
<enumeratedValue>
|
||||
<name>STOP</name>
|
||||
<description>Timer / Counter is stopped</description>
|
||||
<value>0</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>START</name>
|
||||
<description>Timer / Counter is started</description>
|
||||
<value>1</value>
|
||||
</enumeratedValue>
|
||||
</enumeratedValues>
|
||||
</field>
|
||||
</fields>
|
||||
</register>
|
||||
|
||||
<!-- SR: Status Register -->
|
||||
<register>
|
||||
<name>SR</name>
|
||||
<description>Status Register</description>
|
||||
<addressOffset>0x04</addressOffset>
|
||||
<size>16</size>
|
||||
<access>read-write</access>
|
||||
<resetValue>0x00000000</resetValue>
|
||||
<resetMask>0xD701</resetMask>
|
||||
|
||||
<fields>
|
||||
<!-- RUN: Shows if Timer is running -->
|
||||
<field>
|
||||
<name>RUN</name>
|
||||
<description>Shows if Timer is running or not</description>
|
||||
<bitRange>[0:0]</bitRange>
|
||||
<access>read-only</access>
|
||||
<enumeratedValues>
|
||||
<enumeratedValue>
|
||||
<name>Stopped</name>
|
||||
<description>Timer is not running</description>
|
||||
<value>0</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>Running</name>
|
||||
<description>Timer is running</description>
|
||||
<value>1</value>
|
||||
</enumeratedValue>
|
||||
</enumeratedValues>
|
||||
</field>
|
||||
|
||||
<!-- MATCH: Shows if a Match was hit -->
|
||||
<field>
|
||||
<name>MATCH</name>
|
||||
<description>Shows if the MATCH was hit</description>
|
||||
<bitRange>[8:8]</bitRange>
|
||||
<access>read-write</access>
|
||||
<enumeratedValues>
|
||||
<enumeratedValue>
|
||||
<name>No_Match</name>
|
||||
<description>The MATCH condition was not hit</description>
|
||||
<value>0</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>Match_Hit</name>
|
||||
<description>The MATCH condition was hit</description>
|
||||
<value>1</value>
|
||||
</enumeratedValue>
|
||||
</enumeratedValues>
|
||||
</field>
|
||||
|
||||
<!-- UN: Shows if an underflow occured -->
|
||||
<field>
|
||||
<name>UN</name>
|
||||
<description>Shows if an underflow occured. This flag is sticky</description>
|
||||
<bitRange>[9:9]</bitRange>
|
||||
<access>read-write</access>
|
||||
<enumeratedValues>
|
||||
<enumeratedValue>
|
||||
<name>No_Underflow</name>
|
||||
<description>No underflow occured since last clear</description>
|
||||
<value>0</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>Underflow</name>
|
||||
<description>A minimum of one underflow occured since last clear</description>
|
||||
<value>1</value>
|
||||
</enumeratedValue>
|
||||
</enumeratedValues>
|
||||
</field>
|
||||
|
||||
<!-- OV: Shows if an overflow occured -->
|
||||
<field>
|
||||
<name>OV</name>
|
||||
<description>Shows if an overflow occured. This flag is sticky</description>
|
||||
<bitRange>[10:10]</bitRange>
|
||||
<access>read-write</access>
|
||||
<enumeratedValues>
|
||||
<enumeratedValue>
|
||||
<name>No_Overflow</name>
|
||||
<description>No overflow occured since last clear</description>
|
||||
<value>0</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>Overflow_occured</name>
|
||||
<description>A minimum of one overflow occured since last clear</description>
|
||||
<value>1</value>
|
||||
</enumeratedValue>
|
||||
</enumeratedValues>
|
||||
</field>
|
||||
|
||||
<!-- RST: Shows if Timer is in RESET state -->
|
||||
<field>
|
||||
<name>RST</name>
|
||||
<description>Shows if Timer is in RESET state</description>
|
||||
<bitRange>[12:12]</bitRange>
|
||||
<access>read-only</access>
|
||||
<enumeratedValues>
|
||||
<enumeratedValue>
|
||||
<name>Ready</name>
|
||||
<description>Timer is not in RESET state and can operate</description>
|
||||
<value>0</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>In_Reset</name>
|
||||
<description>Timer is in RESET state and can not operate</description>
|
||||
<value>1</value>
|
||||
</enumeratedValue>
|
||||
</enumeratedValues>
|
||||
</field>
|
||||
|
||||
<!-- RELOAD: Shows the currently active Reload Register -->
|
||||
<field>
|
||||
<name>RELOAD</name>
|
||||
<description>Shows the currently active RELOAD Register</description>
|
||||
<bitRange>[15:14]</bitRange>
|
||||
<access>read-only</access>
|
||||
<enumeratedValues>
|
||||
<enumeratedValue>
|
||||
<name>RELOAD0</name>
|
||||
<description>Reload Register number 0 is active</description>
|
||||
<value>0</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>RELOAD1</name>
|
||||
<description>Reload Register number 1 is active</description>
|
||||
<value>1</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>RELOAD2</name>
|
||||
<description>Reload Register number 2 is active</description>
|
||||
<value>2</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>RELOAD3</name>
|
||||
<description>Reload Register number 3 is active</description>
|
||||
<value>3</value>
|
||||
</enumeratedValue>
|
||||
</enumeratedValues>
|
||||
</field>
|
||||
</fields>
|
||||
</register>
|
||||
|
||||
<!-- INT: Interrupt Register -->
|
||||
<register>
|
||||
<name>INT</name>
|
||||
<description>Interrupt Register</description>
|
||||
<addressOffset>0x10</addressOffset>
|
||||
<size>16</size>
|
||||
<access>read-write</access>
|
||||
<resetValue>0x00000000</resetValue>
|
||||
<resetMask>0x0771</resetMask>
|
||||
|
||||
<fields>
|
||||
<!-- EN: Interrupt Enable -->
|
||||
<field>
|
||||
<name>EN</name>
|
||||
<description>Interrupt Enable</description>
|
||||
<bitRange>[0:0]</bitRange>
|
||||
<access>read-write</access>
|
||||
<enumeratedValues>
|
||||
<enumeratedValue>
|
||||
<name>Disabled</name>
|
||||
<description>Timer does not generate Interrupts</description>
|
||||
<value>0</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>Enable</name>
|
||||
<description>Timer triggers the TIMERn Interrupt</description>
|
||||
<value>1</value>
|
||||
</enumeratedValue>
|
||||
</enumeratedValues>
|
||||
</field>
|
||||
|
||||
<!-- MODE: Interrupt Mode -->
|
||||
<field>
|
||||
<name>MODE</name>
|
||||
<description>Interrupt Mode, selects on which condition the Timer should generate an Interrupt</description>
|
||||
<bitRange>[6:4]</bitRange>
|
||||
<access>read-write</access>
|
||||
<enumeratedValues>
|
||||
<enumeratedValue>
|
||||
<name>Match</name>
|
||||
<description>Timer generates an Interrupt when the MATCH condition is hit</description>
|
||||
<value>0</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>Underflow</name>
|
||||
<description>Timer generates an Interrupt when it underflows</description>
|
||||
<value>1</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>Overflow</name>
|
||||
<description>Timer generates an Interrupt when it overflows</description>
|
||||
<value>2</value>
|
||||
</enumeratedValue>
|
||||
</enumeratedValues>
|
||||
</field>
|
||||
</fields>
|
||||
</register>
|
||||
|
||||
<!-- COUNT: Counter Register -->
|
||||
<register>
|
||||
<name>COUNT</name>
|
||||
<description>The Counter Register reflects the actual Value of the Timer/Counter</description>
|
||||
<addressOffset>0x20</addressOffset>
|
||||
<size>32</size>
|
||||
<access>read-write</access>
|
||||
<resetValue>0x00000000</resetValue>
|
||||
<resetMask>0xFFFFFFFF</resetMask>
|
||||
</register>
|
||||
|
||||
<!-- MATCH: Match Register -->
|
||||
<register>
|
||||
<name>MATCH</name>
|
||||
<description>The Match Register stores the compare Value for the MATCH condition</description>
|
||||
<addressOffset>0x24</addressOffset>
|
||||
<size>32</size>
|
||||
<access>read-write</access>
|
||||
<resetValue>0x00000000</resetValue>
|
||||
<resetMask>0xFFFFFFFF</resetMask>
|
||||
</register>
|
||||
|
||||
<!-- PRESCALE: Prescale Read Register -->
|
||||
<register>
|
||||
<name>PRESCALE_RD</name>
|
||||
<description>The Prescale Register stores the Value for the prescaler. The cont event gets divided by this value</description>
|
||||
<addressOffset>0x28</addressOffset>
|
||||
<size>32</size>
|
||||
<access>read-only</access>
|
||||
<resetValue>0x00000000</resetValue>
|
||||
<resetMask>0xFFFFFFFF</resetMask>
|
||||
</register>
|
||||
|
||||
<!-- PRESCALE: Prescale Write Register -->
|
||||
<register>
|
||||
<name>PRESCALE_WR</name>
|
||||
<description>The Prescale Register stores the Value for the prescaler. The cont event gets divided by this value</description>
|
||||
<addressOffset>0x28</addressOffset>
|
||||
<size>32</size>
|
||||
<access>write-only</access>
|
||||
<resetValue>0x00000000</resetValue>
|
||||
<resetMask>0xFFFFFFFF</resetMask>
|
||||
</register>
|
||||
|
||||
|
||||
<!-- RELOAD: Array of Reload Register with 4 elements-->
|
||||
<register>
|
||||
<dim>4</dim>
|
||||
<dimIncrement>4</dimIncrement>
|
||||
<dimIndex>0,1,2,3</dimIndex>
|
||||
<name>RELOAD[%s]</name>
|
||||
<description>The Reload Register stores the Value the COUNT Register gets reloaded on a when a condition was met.</description>
|
||||
<addressOffset>0x50</addressOffset>
|
||||
<size>32</size>
|
||||
<access>read-write</access>
|
||||
<resetValue>0x00000000</resetValue>
|
||||
<resetMask>0xFFFFFFFF</resetMask>
|
||||
</register>
|
||||
</registers>
|
||||
</peripheral>
|
||||
|
||||
<!-- Timer 1 -->
|
||||
<peripheral derivedFrom="TIMER0">
|
||||
<name>TIMER1</name>
|
||||
<baseAddress>0x40010100</baseAddress>
|
||||
<interrupt>
|
||||
<name>TIMER1</name>
|
||||
<value>4</value>
|
||||
</interrupt>
|
||||
</peripheral>
|
||||
|
||||
<!-- Timer 2 -->
|
||||
<peripheral derivedFrom="TIMER0">
|
||||
<name>TIMER2</name>
|
||||
<baseAddress>0x40010200</baseAddress>
|
||||
<interrupt>
|
||||
<name>TIMER2</name>
|
||||
<value>6</value>
|
||||
</interrupt>
|
||||
</peripheral>
|
||||
</peripherals>
|
||||
</device>
|
||||
Reference in New Issue
Block a user